Category Archive: hackintosh

The Realtek ethernet chips can perform ugly with the RealtekRTL8111.kext and its default settings on the older Core2 machines (afp, smb, ftp, nfs, http as well). To resolve the issue, set the enableCSO6, enableEEE, enableTSO4, enableTSO6 flags to false in the Info.plist file.

Here it is my newest Clover build. Since last time I made a research again in the spd.c file and in the DDR4 SPD specification, and I realised that we can identify the speed from the Minimum Cycle Time and what is a most important thing: we must paging to access to upper 256byte of the SPD data.

The Mac OS Mavericks runs great on this laptop, but to get the wlan work, the original wifi card must be replaced.
The UEFI firmware prevent to start with other card than the original, which thing already made a lot of headaches to hp users.
I patched the firmware, and with an also patched flasher, I been able to overwrite the ROM with the modified version.

You can download the modificated files from here => sp54846.zip

I patched the Clover EFI bootloader, to get recognize the DDR4 RAM module size correctly, from the SPD datas.

diff --git a/rEFIt_UEFI/Platform/spd.c b/rEFIt_UEFI/Platform/spd.c
index 04c66d8..a7d389d 100644
--- a/rEFIt_UEFI/Platform/spd.c
+++ b/rEFIt_UEFI/Platform/spd.c

@@ -585,9 +585,24 @@ VOID read_smb(EFI_PCI_IO_PROTOCOL *PciIo)

case SPD_MEMORY_TYPE_SDRAM_DDR4:

+ DBG("SPD[%d]: spdbuf[4]: @0x%x n", i, spdbuf[4]);
+ DBG("SPD[%d]: spdbuf[5]: @0x%x n", i, spdbuf[5]);
+ DBG("SPD[%d]: spdbuf[12]: @0x%x n", i, spdbuf[12]);
gRAM.SPD[i].Type = MemoryTypeDdr4;
- gRAM.SPD[i].ModuleSize = spdbuf[4] & 0x0f;
- gRAM.SPD[i].ModuleSize = (1 << gRAM.SPD[i].ModuleSize) * 256;
+ // size = ((u64)rows * cols * banks * ranks) * bit;
+ // (spdbuf[4] & 0x30) >> 4 : bank address bits
+ // (spdbuf[4] & 0xC0) >> 6 : bank group bits
+ // banks = (4 << addressbits) * (1 << bank group bits)
+ // ((spdbuf[12] & 0x38) >> 3) :ranks
+ // (((spdbuf[5] & 0x38) >> 3)+12) :rows
+ // ((spdbuf[5] & 0x7)+9) : cols
+ gRAM.SPD[i].ModuleSize = (
+ (((UINT64)1 << (12 + ((spdbuf[ 5] & 0x38) >> 3))) *
+ (1 << (9 + ( spdbuf[ 5] & 0x07))) *
+ (1 + ((spdbuf[12] & 0x38) >> 3)) *
+ (4 << ((spdbuf[ 4] & 0x30) >> 4)) *
+ (1 << ((spdbuf[ 4] & 0xC0) >> 6))) >> (20 - 3)
+ );

break;

I added the skylake processor family definitions to the CPUSensors.kext, so it doesn’t cause kernel panic on boot.
It seems to the sensors work fine too.

My changes available on my GitHub profile: https://github.com/majonez/HWSensors